@Kmpkt Any news on the 1usmus front?
@Danlopez1222 Any progress?
I've been doing some thinking (all I can do as I don't know how to mess with the BIOS myself). Could the issue be that this board does, not want to boot headless?
So the APUs only have 16 PCIe lanes coming directly from it as compared to the 24 from other Ryzen CPUs.
CPU - 16 lanes for GPU or 1st slot + 4 lanes for NVME boot drive + 4 lanes for the chipset = 24 total lanes
APU - 8 lanes for iGPU (never leaves the socket) + 8 lanes for dGPU or 1st slot + 4 lanes for NVME boot drive + 4 lanes for the chipset = 16 total lanes + 8 on die lanes.
So could the issue be that POST is looking for the display adapter in the 8 internal lanes and not seeing it thus failing POST. Is the POST process a module in the AGESA that could be swapped or modified?