SFF.Network ASRock Z270M-STX MXM Micro-STX Motherboard Pictured

EdZ

Virtual Realist
May 11, 2015
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This would be one of the advantages of a Ryzen version of this board. Ryzen has been designed to take one NVMe over a dedicated x4 link to the CPU, so hypothetically in this situation only two of the three NVMe would be behind the chipset. Now I'm not sure if you can RAID a chipset SSD to a CPU-direct SSD, but at the very least you would be able to have two separate high performance drives with virtually no real world performance deficit.
Ryzen CPUs have an 4x link for a single SSD, but if you want any additional drives they have to go via the chipset, which only has PCIe 2.0 lanes available for peripherals.
 
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King of Cable Management
Sep 26, 2015
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Ryzen CPUs have an 4x link for a single SSD, but if you want any additional drives they have to go via the chipset, which only has PCIe 2.0 lanes available for peripherals.

It's easy to miss, but note that each of the two SATA Express can also be configured as 2 PCI-e 3.0 lanes, per the first note.
 
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King of Cable Management
Sep 26, 2015
775
759
Yes, but you were interested in latency.

Here is the latency of NAND SSD's relative to much faster cache and RAM and slower HDD's


And then here is Optane relative to those.


As you can see, Optane closes the gap by an order of magnitude. But, you will pay for it.

For those interested, RAM Drive/Disk closes the gap even further and PCPer speculates that Optane DIMMs will achieve similar performance, and possibly get better performance with OS optimizations.

 
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Phryq

Cable-Tie Ninja
Nov 13, 2016
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www.AlbertMcKay.com
Hmmm, so looking at that, SSD latency (less than 1ms) shouldn't be a problem at all. So only random read IOPS is important to me.

But that doesn't look right for the IOPS of an NVMe. I'm wondering what the IOPS of a samsung 960 pro is compared to typical ram.

Other musicians are telling me NVMe is too slow to read directly from disk, and our software must be loaded into RAM, but I'm not seeing evidence of that in any numbers.
 

EdZ

Virtual Realist
May 11, 2015
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It's easy to miss, but note that each of the two SATA Express can also be configured as 2 PCI-e 3.0 lanes, per the first note.
Looking through spec sheets for available boards that divert these lanes to a second m.2 slot, they are only available as x2 2.0 lanes, or x4 2.0 lanes (with a PCIe slot disabled when doing so). No AM4 motherboard I can find with more than one m.2 slot has the second slot using 3.0 lanes at all.
 

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King of Cable Management
Sep 26, 2015
775
759
Hmm, I thought that it would be in the PCI-e specification for the aggregation of PCI-e lanes where controllers could take on a master-slave relationship for wider links. This is done in the Intel HEDT processors (page 13) with 10 PCI-e controllers, each controlling 4 lanes, but are aggregated to form the larger links. The chipsets have individual controllers per lane, but they are sometimes aggregated into x2 and x4 links. I'm curious if there would be a technical reason preventing a x4 PCI-e link to be made through the X370, B350, or A320 chipset. It looks like X300 and A300 can, but they will need those lanes for things like GbE and WiFi, as well.
 

Phuncz

Lord of the Boards
SFFn Staff
May 9, 2015
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Looking through spec sheets for available boards that divert these lanes to a second m.2 slot, they are only available as x2 2.0 lanes, or x4 2.0 lanes (with a PCIe slot disabled when doing so). No AM4 motherboard I can find with more than one m.2 slot has the second slot using 3.0 lanes at all.
The problem is that board manufacturers need to incorporate this function correctly, which may or may not have been due to the rushed release of Ryzen. I wouldn't be surprised AMD responded with the PCIe lane option after motherboard manufacturers complained that SATA-Express has never been useful for more than a front panel add-on, but more PCIe lanes are very valuable.

So it may be that we'll start seeing boards at a later date when a second generation of motherboard designs have caught up to the latest specs. And that's why I'll be ending up buying a second motherboard in 2018 most likely.
 

Phuncz

Lord of the Boards
SFFn Staff
May 9, 2015
5,845
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It'll depend on the way the M.2 slots are connected, I don't think we have a diagram already. But in theory, all could run at PCIe 3.0 at 4 lanes each.
 

EdZ

Virtual Realist
May 11, 2015
1,578
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The problem is that board manufacturers need to incorporate this function correctly, which may or may not have been due to the rushed release of Ryzen. I wouldn't be surprised AMD responded with the PCIe lane option after motherboard manufacturers complained that SATA-Express has never been useful for more than a front panel add-on, but more PCIe lanes are very valuable.

So it may be that we'll start seeing boards at a later date when a second generation of motherboard designs have caught up to the latest specs. And that's why I'll be ending up buying a second motherboard in 2018 most likely.
The SATA-E lanes were also marked with the same [4] note as the Chipset lanes that 'PCIe 3.0 connectivity pending certification', so they may also be limited to 2.0 like the chipset lanes. Whether that 'pending certification' will eventually happen, and whether it can be rolled out to existing boards or require a new board revision, is probably only known to AMD and board manufacturers.
 
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hegel

What's an ITX?
Jun 1, 2017
1
0
$2000. Even with mxm, that price is incredibly high. It could have been really good but I guess manufacturers don't see the potential.
 

jeshikat

Jessica. Wayward SFF.n Founder
Original poster
Silver Supporter
Feb 22, 2015
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The price isn't finalized, but we were told it'd be a bit under $2000 for the barebones 1080 model, so that includes case, motherboard, MXM video card, GPU heatsink, and AC adapter.

So CPU, RAM, and storage needs to be added to complete the system.
 

BirdofPrey

Standards Guru
Sep 3, 2015
797
493
I know MXM modules are expensive and margins are low for this type of machine, but that's a few hundred higher than I'd expect to pay for a complete system.