SFF.Network [SFF Network] Intel Z170 motherboards launch

Intel’s new Skylake platform partially launches today, starting at the high-end with two new CPUs (the i7-6700K and i5-6600K) and new motherboards based on the Z170 chipset. The rest of the CPU lineup and the other motherboard chipsets will be released at a later date.

Read more here

 

[EdZ]

It means you can have a card that inserts into a port directly, or take a commodity cable and have that card now on a riser. You eliminate the PCIe riser and replace it with a cable that should be general-purpose and more compact.

 

[|||]

It means you can have a card that inserts into a port directly, or take a commodity cable and have that card now on a riser. You eliminate the PCIe riser and replace it with a cable that should be general-purpose and more compact.

One of the issues with that approach is signal integrity. With PCI-e, they are bumping up the signal frequency to 8GHz in PCI-e 4.0 (double the 4GHz in PCI-e 3.0; PCI-SIG explored 12GHz, but it was found to be practically impossible). This will limit connections to have at most two connectors in the system...so if you have an external cable with two connectors at each end, that will be it; no daisy chaining, no bulkhead connectors, or anything else. To minimize the chance of any errors in the system, you want to minimize the number of connectors and having one on the board that interfaces directly with the card, instead of two on a cable, should help.

Also, EMI becomes an issue when you have traces or cables of sufficient length that will act as antennas.

I do see where you are going with that statement, I just think that the physical limitations are beginning to be too big a compromise that may cause data errors across the links. I think a solution like this will be more feasible when optical links are used...a lot of work to make sure optical interfaces are robust enough for typical consumer use needs to be done, though.

 

[EdZ]

One of the issues with that approach is signal integrity. With PCI-e, they are bumping up the signal frequency to 8GHz in PCI-e 4.0 (double the 4GHz in PCI-e 3.0; PCI-SIG explored 12GHz, but it was found to be practically impossible).

Part of that is the limitation of trying to push high-frequency signals over parallel exposed board traces (and through a card-edge connector), which then have to travel some significant distance across the motherboard (in the case of ATX boards). Moving to a new form-factor that allows twisted-pairs (or bonded coax) could aid this.

 

[BirdofPrey]

Not really, since you can't easily do twisted pairs ON the boards. That would make this useful for ensuring signal integrity on flexible risers, but it wouldn't have much of any benefit on board to board connections over the existing card edge connectors.

Risers themselves aren't very bulky, and if there's any improvement they need, it would be a slot that actually allows a multi lot riser to connect to one slit instead of having cables everywhere, but those don't seem to catch on (PCI riser spec never went anywhere, and I just stumbled upon a 48 lane riser spec the other day that I didn't even know existed).

Some things, I can see benefiting from being able to be put remote to the motherboard, maybe have host adapter as part of a drive backplane instead of connecting to it, and to allow free placement in slim systems (it's notable that their example was a laptop), but expansion slots don't have huge disadvantages enough to make them go away for the time being

 

[|||]

MSI has done some interesting stuff to improve signal integrity between the the processor and the memory. With the decreased voltage and increase frequencies, innovations like this are needed.

https://gaming.msi.com/article/ddr4-boost

Optimized routing procedure

However, there is one more feature to ensure an optimal signal. The PCB is built up by a combination of resin and fiberglass. To get the best possible signal, it is important that the traces that transport these signals are routed over fiberglass bundles. In the image below, you can see two traces. The upper trace is mostly routed over fiberglass bundles while the other one is constantly interrupted by holes of resin. The signal that is transported by the bottom trace will be affected because of the negative impact caused by interruptions; the fiber weave effect.

To resolve this problem, the traces MSI motherboards with DDR4 Boost are routed differently. To ensure maximum routing over fiberglass bundles, these traces make use of a zig-zag routing procedure which prevents the fiber weave effect and makes sure the signal is stable.

 

[EdZ]

Depending on via cost (and production reliability) pairs could be 'twisted' between board layers. Though this may increase bulk significantly making routing more difficulty, unless this allowed for a much greater frequency increase and a drop in physical lane count (similar to the regular png-ponging between serial and parallel bus designs both internal and external).

 

[iFreilicht]

I wonder how much of MSIs marketing is just marketing and how much of this has an actual effect on signal stability.

 

[EdZ]

It seems in the realm of "that could technically work, but everyone else's boards don't have issues with path-length so the effect is either extremely tiny or already considered when writing the PHY specifications".

 

[|||]

Just as DDR3 speeds increased over time, so will DDR4. There is also supposed to be DDR4L memory at 1.05V, which will need excellent signal integrity. Don't forget that before DDR4 was launched, the public information was pointing to limits of 1-to-1 connectivity for it (1 DIMM per memory channel...early tests showed issues with a multi-drop connection).

 

[jeshikat]

I made a spreadsheet of the Z170 ITX boards for comparing them: https://docs.google.com/spreadsheets/d/1saNUPX6ycN20R1Yu_lNDPpowTfVwmrQiwHYVNAoZenw/edit?usp=sharing

 

[Phuncz]

Achievement Unlocked: Post of the Day

 

[EdZ]

I made a spreadsheet of the Z170 ITX boards for comparing them: https://docs.google.com/spreadsheets/d/1saNUPX6ycN20R1Yu_lNDPpowTfVwmrQiwHYVNAoZenw/edit?usp=sharing

Nice! One correction: the ASUS Z170i Pro Gaming has 4x SATA 3.0 ports, not 2x.

 

[Vittra]

I find myself dissatisfied with all the ITX offerings.

Edit - I suppose the Asrock is the best overall.

 

[jeshikat]

Nice! One correction: the ASUS Z170i Pro Gaming has 4x SATA 3.0 ports, not 2x.

Good catch, fixed.

 

[|||]

I find myself dissatisfied with all the ITX offerings.

Edit - I suppose the Asrock is the best overall.

I'm in the same boat as you and feel like the offerings right now are not that great.

 

[Vittra]

GIGABYTE Motherboards with Intel® Thunderbolt™ 3 Support Expands!

 

[Phuncz]

But no word on mATX or mITX boards, alas.

 

[Vittra]

I'm not entirely sure what they are referring to for the boards they did mention. Neither the EU or US sites show an updated BIOS/UEFI, or any drivers that would correspond to the announcement.

 

[iFreilicht]

I guess the press guys were faster than the BIOS guys. Even if they only did that for the ATX boards, it shows that it's possible. And as their mATX and mITX boards use the same controller, I wouldn't be surprised if they plan to release updated BIOSes for those in the future as well.

It could also be that they wanted Thunderbolt on all boards at launch but couldn't get Intel to certify them in time or weren't able to get it to run stable enough, so they postponed it and are now slowly rolling that functionality out. Stuff like that happens quite frequently in software development.