future m.2 bandwidth for PCIe adapters?

[BonfireOfDreams]

My understanding is that your NVMe M.2 > PCIe x16 adapter has limitations of PCIe x4 speeds as the bandwidth is limited to that amount on the motherboard.

As interest seems to be growing for this graphics adapter solution to be used with Mini-STX boards & that ultra small form factor, do you see potential for future M.2 solutions to be tied to x16 lanes on the motherboard itself? Perhaps there's a more elegant solution than I'm thinking of, but the current adapter method seems to have the smallest physical footprint for the most potential power.

Aside from a lack of interest/usability up to this point, are there any current limitations that would prevent this (too much physical space required for all 16 lanes in mini-stx form factor, too much heat produced, etc.)?

 

[Windfall]

My understanding is that your NVMe M.2 > PCIe x16 adapter has limitations of PCIe x4 speeds as the bandwidth is limited to that amount on the motherboard.

As interest seems to be growing for this graphics adapter solution to be used with Mini-STX boards & that ultra small form factor, do you see potential for future M.2 solutions to be tied to x16 lanes on the motherboard itself? Perhaps there's a more elegant solution than I'm thinking of, but the current adapter method seems to have the smallest physical footprint for the most potential power.

Aside from a lack of interest/usability up to this point, are there any current limitations that would prevent this (too much physical space required for all 16 lanes in mini-stx form factor, too much heat produced, etc.)?

Biggest issue is that there are physically not enough traces in the m.2 connector. You would need 4 (may be wrong) to get a physical x16 connection, and they would have to be chained a certain way. While it is feasible, it is not practical, considering the performance loss from x4-x16 is next to nothing.

 

[BonfireOfDreams]

Biggest issue is that there are physically not enough traces in the m.2 connector.

Perhaps the nature of the question is too speculative in asking but this is where the question arises; whether or not the M.2 standard can adopt x16 traces in either versioning or evolution. I'm wondering if anyone knows what exactly prevents the standard from using x16 at this time.

 

[kotproger]

Your question contains the answer - this is the STANDARD. No longer provided. Besides, the point is this, if PCIE gen4 is on the horizon and gen5.
The number of those who want to use non-standard m2 is quite small, so that the industry would consider this. And any non-standard decisions are doomed to oblivion.

 

[BonfireOfDreams]

Your question contains the answer - this is the STANDARD. Besides, the point is this, if PCIE gen4 is on the horizon and gen5.

Great point, bandwidth is supposed to double in gen4 & it looks like gen5 is not far off either which is slated to double bandwidth again. Ergo x4 will be what today's x16 is soon. Guess we'll see how much bandwidth future cards require.

 

[W4RR10R]

Well, I don't see a physical spec change coming but with pcie gen 4 on 3rd gen Ryzen a x4 connection would be ~x8 gen 3 speeds, I'm not sure if pcie upscales like that though.

 

[Kmpkt]

There's is very little performance loss when using a x4 connection and virtually none using x8 as GPUs cannot fully utilize PCIe 3.0 x16 anyways (as you can see here):

https://www.techpowerup.com/reviews/NVIDIA/GeForce_GTX_1080_PCI_Express_Scaling/

If PCIe 4.0 x4 is the equivalent of PCIe 3.0 x 8 you're looking at no performance loss at 4k, 1440p or 1080p. As it stands you only see a 3-4% performance loss by using a pure PCIe 3.0 x 4 connection.

 

[Windfall]

There's is very little performance loss when using a x4 connection and virtually none using x8 as GPUs cannot fully utilize PCIe 3.0 x16 anyways (as you can see here):

https://www.techpowerup.com/reviews/NVIDIA/GeForce_GTX_1080_PCI_Express_Scaling/

If PCIe 4.0 x4 is the equivalent of PCIe 3.0 x 8 you're looking at no performance loss at 4k, 1440p or 1080p. As it stands you only see a 3-4% performance loss by using a pure PCIe 3.0 x 4 connection.

As I said, no real benefit.

 

[W4RR10R]

Now I may be getting ridiculous here, but ... four way crossfire. A300m has 2 m.2 (pcie x4) which with 3rd gen Ryzen could become gen 4, if the can support bifurcation, you could (theoretically) connect 4 cards at x4 gen 3 speeds. The scaling would be bad and there is basically no practical use but why not.

 

[BonfireOfDreams]

Now I may be getting ridiculous here, but ...

Thanks for all your input! Glad to know there's less bandwidth constraints than I thought.

 

[W4RR10R]

Thanks for all your input! Glad to know there's less bandwidth constraints than I thought.

Yeah, until recently the pcie 3.0 x16 bandwidth has been excessive, not even flagship consumer GPUs could fully saturate it, the 2080ti comes extremely close, but from what I heard still doesn't suffer a huge performance hit at x8.

 

[dfrgu]

Perhaps the nature of the question is too speculative in asking but this is where the question arises; whether or not the M.2 standard can adopt x16 traces in either versioning or evolution. I'm wondering if anyone knows what exactly prevents the standard from using x16 at this time.

Short answer: no, not even theoretically.

Long version:

One PCIe lane requires at least 4 physical pins, 2 for transmitter and 2 for receiver. According to the current standard, the M.2 M key connector
has 75 pins, and 16 of them are currently not occupied. Therefore, in theory, the max number of PCIe lanes you can get from an M.2 connector would be 8. But in the real world situation, this is also hard to do, because you still need a ground pin for each PCIe lane, but the current connector cannot offer those extra pins.

Unfortunately, PCIe x6 is not in PCIe standard either, so you are limited to use 4 lanes with an M.2 M key connector.

But, if you have faster lanes, you don't need more lanes, and this is exactly what PCIe 4.0 is going to do.

 

[SFF EOL]

This seems to ignore APU development as well.