8x PCIe NVMe Raid0

[ChainedHope]

Recently stumbled on this video and figured someone else would like it. In the video they use 2 Asus Hyper cards to run 8x NVMe Raid0 without the DMI restrictions.

It gave me an idea for my in-planning concept build and wanted to share. Looking into AM4/TR4 motherboards that support the Asus Hyper card right now to see if theres a mATX version that I can split 1 PCIe lane to be 8x/8x and another to be 4x/4x/4x/4x. With AM4 this would force the GPUs into 4x/4x but im okay with that. I ran my nanos at 4x/4x in my intel system for a while because of some issues and the performance difference was only 2-3% fps loss. In an AM4 build I would only be able to use 3 NVMe drives because of the 20 PCIe lanes (24 if you count chipset), but in TR4 I could get the full 32 lanes.

This would allow me to do some trickery with setting up crossfire and a very nice NVMe raid alongside it without the bottleneck of DMI and the Hyper card is slim enough that I can easily find a place for it in the suitcase portion of my build.

 

[jtd871]

Would you be looking at the TR1900 CPU, then?

 

[SeñorDonut]

This is ridiculous. I love it!

 

[confusis]

I do like how AMD's HEDT strategy is "throw PCIe lanes at everything, no artificial limitations"

 

[ChainedHope]

Would you be looking at the TR1900 CPU, then?

I was eyeing the 1920x but yeah the 1900x is a more likely candidate due to price. Although the chance of me going TR4 and not AM4 is very unlikely as even with my most demanding tasks (3D Cad rendering and heavily edited videos) I dont mind taking the performance decrease if I'm saving ~$400 usd. Especially since that would give me more to spend on making my desk/suitcase build.

I do like how AMD's HEDT strategy is "throw PCIe lanes at everything, no artificial limitations"

I wont lie, its ridiculous but its still a solution to the problem that chipsets cause in terms of bandwidth. Its easier to get more lanes than to split components over multiple chipsets.

 

[jØrd]

I do like how AMD's HEDT strategy is "throw PCIe lanes at everything, no artificial limitations"

Ditto, in the last 12 months ive become ridiculously dependant on PCIe. Intel's insistence on using it as a way to artificially segment the market has become a real problem ive had to start working around that has, at times, cost me real money