SFF.Network [SFF Network] Plextor Launches M6V, a Value SSD

PlayfulPhoenix

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Is it just me, or is it kinda funny that the process node for solid state storage is considerably smaller than that of current-generation graphics?

I mean, I recognize the unique challenges that AMD and nVidia have faced with their partners with respect to making smaller nodes viable at scale, and so forth. But still!
 

Aibohphobia

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Is it just me, or is it kinda funny that the process node for solid state storage is considerably smaller than that of current-generation graphics?
I find it hilarious because they're finding that the smaller process nodes are actually undesirable for NAND due to the lower endurance and everybody's now investing in 3D stacked NAND so they can go back to bigger process nodes :p
 
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PlayfulPhoenix

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I find it hilarious because they're finding that the smaller process nodes are actually undesirable for NAND due to the lower endurance and everybody's now investing in 3D stacked NAND so they can go back to bigger process nodes :p

It's a very smart move, though - the initial work to make that technology viable is a big jump, but the benefits after the fact are huge. You can get really big capacities, you can use a much less expensive process node, you can get faster read speeds, far better endurance... And the number of layers you can conceivably make is fairly large.

I really wouldn't be surprised if, five years from now, there were NAND cells that were stacked 128-256+ layers high. I'd bet that resolving issues with vertical expansion will remain cheaper than improving smaller process nodes for some time.
 
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confusis

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I'm surprised that we don't see massive storage in cheaper NAND process chips in a 3.5" form factor.. 2.5" seems to be the default
 

EdZ

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I'm surprised that we don't see massive storage in cheaper NAND process chips in a 3.5" form factor.. 2.5" seems to be the default
Mainly because you don't need to; you can only fit so many chips per channel on an SSD controller, and that many chips is not even enough to fill a 2.5" drive most of the time. You can gang up multiple drives with a RAID controller within a single box, but for more than two drives it makes more sense to keep them all separate and use a dedicated storage controller to aggregate them.

3D VNAND is pretty cool, but it does have one major drawback: a LOT of patterning stages. Even if you have a really mature process with a 99% no-defect rate, after 48 layers that's an effective rate of 61%! Even a 99.5% patterning success rate over 48 layers is a 78% overall rate. Of course, failures are due to more than just patterning (defects in raw materials, contamination during transport/handling, etc), but with that many patterning steps you're much more vulnerable to patterning errors like mask alignment, and to problems during the multiple chemical coatings washings between patterning, and unlike physical defects these are problems that often affect a whole wafer rather than one or two individual dies.
 
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Phuncz

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Because 3,5" is obsolete for anything except spinning platters. More chips = more expensive and only enterprise wants to pay $ 1,000's for a single drive.

The problem isn't the horizontal space:

This was 2012, 4TB SSD 3,5":



This was 2014, 4TB SSD 2,5":

http://www.tweaktown.com/news/38249...ehemoth-optimus-max-for-inspection/index.html

This is 2015, 2TB SSD 2,5":

http://www.thessdreview.com/daily-n...pro-2tb-ssd-review-2tb-ssds-make-their-entry/

As the entire PCB of an 2,5" drive isn't even used, or the layout on the PCB efficiently for that matter, it's clearly not the issue (anymore) of not enough realestate. Stacking NAND is the way forward to reduce prices, power consumption and improve performance.

3,5" bricks are relics because of the spinning glass discs that HDD's had, and they were originally 5,25" o_O

For SSDs, where they can make you a wedding ring out of storage if you wanted, there is no need to cling to an old format.
Enterprise has been adopting 2,5" (even for HDDs) too for a while for most storage needs, except for "cold storage" (slow, archive).

3D VNAND is pretty cool, but it does have one major drawback: a LOT of patterning stages. Even if you have a really mature process with a 99% no-defect rate, after 48 layers that's an effective rate of 61%! Even a 99.5% patterning success rate over 48 layers is a 78% overall rate. Of course, failures are due to more than just patterning (defects in raw materials, contamination during transport/handling, etc), but with that many patterning steps you're much more vulnerable to patterning errors like mask alignment, and to problems during the multiple chemical coatings washings between patterning, and unlike physical defects these are problems that often affect a whole wafer rather than one or two individual dies.
I was wondering if it indeed meant that stacking NAND also meant that defects per layer multiply the failure rate. That's why they want to keep the process "large", so they have more control on defects and allow a better failure rate, so more chips are good for use and the price goes down. Thanks for the info !