SFF.Network Intel Integrates Thunderbolt 3 into Future CPUs and Releases Specs
- Thread starter Phuncz
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I support this, I have thunderbolt ports available to me to use but I've never bothered with investing in it. I know its good but like you say, I'm perfectly content not using it.
I'm surprised that outside of OCuLink, there haven't been any competitors to external PCIe protocols (discounting data center solutions).
Side note, TB is widely popular in the audio and video production world for low latency interfaces that don't tax the CPU as heavily.
Side note, TB is widely popular in the audio and video production world for low latency interfaces that don't tax the CPU as heavily.
This is great news!
Side note, what ever happened to OCuLink? It's been out for a while, but do any products beyond connectors exist?
Side note, what ever happened to OCuLink? It's been out for a while, but do any products beyond connectors exist?
I use TB3 religiously and have swapped out a lot of my stuff for it.
I even upgraded my Z170X Designare, one of the 2 boards that has 2 TB3 ports.
I also have the 2016 Macbook Pro
I use it to transfer raw video at speeds that are too freaking crazy. I can also use the Samsung T3 I have and edit right off that.
I also run a Lexar Professional Workflow off it
I even upgraded my Z170X Designare, one of the 2 boards that has 2 TB3 ports.
I also have the 2016 Macbook Pro
I use it to transfer raw video at speeds that are too freaking crazy. I can also use the Samsung T3 I have and edit right off that.
I also run a Lexar Professional Workflow off it
I'm very excited for this. Thunderbolt needs to be much more mainstream in my opinion. Hopefully it will catch on more and we can get some cheaper Thunderbolt accessories.
About danged time!
If PCIe 4.0 starts to bump up against limits that TB3 cannot handle through trivial extensions, then we may see OCuLink migrate down to the consumer level (as we saw SFF-8639 migrate from the world of SAS as U.2).
The problem with OCuLink today is cost: there are so few cases that actually need it over using (for example) one of 3M's twinax PCIe extensions - or just TB3 routed internally - that the few situations that do need it can be charged multiple wheelbarrows of cash to use it, and vendors will charge the multiple wheelbarrows to recoup their investment over tiny volumes.
If PCIe 4.0 starts to bump up against limits that TB3 cannot handle through trivial extensions, then we may see OCuLink migrate down to the consumer level (as we saw SFF-8639 migrate from the world of SAS as U.2).
Yeah that's it's main problem, it's trying to be a solution to things that already have solutions.
The two main purposes are flexible placement of expansion boards and storage. At the moment, there doesn't seem to me much call for flexible placement of expansion boards, there aren't all that many times putting it somewhere other than on the mainboard is useful, and most of the times it could be useful, risers suffice. For storage, U.2 has already become the standard being used for SATA Express as well bay-mounted PCIe drives and is an extension of the ubiquitous cabling standard SAS uses that SATA is also a subset of.
So in other news, I wonder when Thunderbolt 3 will be on Intel processors. I doubt they can integrate it onto just a process shrink or minor architectural improvements, so I suspect it will wait until at least the next micro-architecture. That also means it's probably been planned for a while now.
I wonder, though, with Intel making the specs open soon, will AMD be able (if they wanted to) to add Thunderbolt to their Ryzen processors on the AM4 through the existing USB 3.0 lines, or if that wouldn't be feasible due to how USB-C maps the signal lines.
The two main purposes are flexible placement of expansion boards and storage. At the moment, there doesn't seem to me much call for flexible placement of expansion boards, there aren't all that many times putting it somewhere other than on the mainboard is useful, and most of the times it could be useful, risers suffice. For storage, U.2 has already become the standard being used for SATA Express as well bay-mounted PCIe drives and is an extension of the ubiquitous cabling standard SAS uses that SATA is also a subset of.
So in other news, I wonder when Thunderbolt 3 will be on Intel processors. I doubt they can integrate it onto just a process shrink or minor architectural improvements, so I suspect it will wait until at least the next micro-architecture. That also means it's probably been planned for a while now.
I wonder, though, with Intel making the specs open soon, will AMD be able (if they wanted to) to add Thunderbolt to their Ryzen processors on the AM4 through the existing USB 3.0 lines, or if that wouldn't be feasible due to how USB-C maps the signal lines.
TB3 hangs off of PCIe lanes, so they'd need to divert some from another device. Either from the GPU lanes (dropping from 16x to 8x, and leaving 4x lanes unused) or have an option of using the 4x that are currently dedicated to either m.2 or SATA also switchable to TB3.
Yeah, but if it's internal to the chip, there's no reason it would need to eat up the external lanes if they can add more internally.
My main question is if the USB 3 on AM4 chips has 1 or 2 pairs of TRx lanes or two, since while USB only uses one pair, USB C alt modes (like Thunderbolt) require 2 pairs.
Unless you have a TB3 port sitting on the CPU package, you still need physical connections in the socket to allow for extra PCIe lanes to exit and eventually connect to the external port.
You're thinking about pins on the externally facing Type C connector. Supporting Thunderbolt 3 requires electronics far further back in the chain. TB3 and other Alternative Modes do not use the USB 3.1 lanes at all, they are effectively disconnected from the port: the entire point of Alternate Mode is to take the contacts used by those lanes and instead use them to carry another protocol (like PCIe for TB3, TMDS for HDMI, or packetised LVDS for DisplayPort). When using alternate Mode, the only USB link is the 2.0 'core' link in the centre reversible 4 pins that is used to communicate feature availability (e.g. to allow the host to tell you you plugged a DP monitor into a port that does not support that Alternate Mode).
No you aren't understanding what I am asking.
USB C has 4 differential signaling lanes. In USB mode, 2 of them are used chosen by the controller at plug in. In Alt mode up to 4 of them can be used for the alternate mode (and if it's 1 or 2 then the other two can also still carry USB 3 traffic). The controller at the port can multiplex the lanes between the USB controller and any controllers for alt mode. This changes the protocol and signaling but does not, in any way, affect the physical layout of the ports or cables.
Also remember the controller chips for the ports aren't soldered to the port itself, they are connected via motherboard traces, which means any remapping of the port is also a remapping of those traces. The difference here is where the controller doing that is.
I am asking, with AM4 having USB 3.0 controllers on the chip, does it have enough differential pairs on the CPU USB controller to allow USB C to be driven directly from the CPU straight to the port with no intervening logic (such as a multiplexer to take the Tx and Rx lanes and map them to the right side of the USB-C port). If it DOES have the 4 differential pairs per port (along with the sideband lines) coming from the CPU, then multiplexing Thunderbolt 3 should be possible. Alternatively, if it does only have 1 Tx/Rx pair per port, can multiple USB 3 links be ganged?
USB C has 4 differential signaling lanes. In USB mode, 2 of them are used chosen by the controller at plug in. In Alt mode up to 4 of them can be used for the alternate mode (and if it's 1 or 2 then the other two can also still carry USB 3 traffic). The controller at the port can multiplex the lanes between the USB controller and any controllers for alt mode. This changes the protocol and signaling but does not, in any way, affect the physical layout of the ports or cables.
Also remember the controller chips for the ports aren't soldered to the port itself, they are connected via motherboard traces, which means any remapping of the port is also a remapping of those traces. The difference here is where the controller doing that is.
I am asking, with AM4 having USB 3.0 controllers on the chip, does it have enough differential pairs on the CPU USB controller to allow USB C to be driven directly from the CPU straight to the port with no intervening logic (such as a multiplexer to take the Tx and Rx lanes and map them to the right side of the USB-C port). If it DOES have the 4 differential pairs per port (along with the sideband lines) coming from the CPU, then multiplexing Thunderbolt 3 should be possible. Alternatively, if it does only have 1 Tx/Rx pair per port, can multiple USB 3 links be ganged?
Yeah, but the chip can be changed, and they would obviously have to since I am asking about the potential for future integration.
With the socket not going to change for a few CPU generations, it's more important to know what sort of signaling standards that can potentially work with.
That's why I specifically asked if AM4 would interfere.
With the socket not going to change for a few CPU generations, it's more important to know what sort of signaling standards that can potentially work with.
That's why I specifically asked if AM4 would interfere.
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