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[USER=11649]@xredlinexx1[/USER] Essentially the bottleneck would be removed from the GPU to CPU interface. Without knowing too much about the board, the PCIe lanes may also not be sufficient to handle the load. What is more likely is that the total performance of the system will be limited by the board power output and VRM, which I bet are lacking given the 65W TDP maximum currently allowed. Still, we can push the system for all it has...higher CPU core count and clock speed help with performance.

[QUOTE="rook, post: 173926, member: 8168"] [USER=11649]@xredlinexx1[/USER] Essentially the bottleneck would be removed from the GPU to CPU interface. Without knowing too much about the board, the PCIe lanes may also not be sufficient to handle the load. What is more likely is that the total performance of the system will be limited by the board power output and VRM, which I bet are lacking given the 65W TDP maximum currently allowed. Still, we can push the system for all it has...higher CPU core count and clock speed help with performance. [/QUOTE]

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